Architecture &
Dual Output Design

The TPS51125 is a Texas Instruments buck converter IC delivering dual independent voltage rails critical to MacBook 13" and 15" logic boards. This device converts system bus voltage (typically 13.0V–16.8V from the battery or power adapter) into two fixed output rails: a processor power rail and a secondary support rail for SoC peripherals.

The architecture differs fundamentally from monolithic single-output designs. The TPS51125 integrates two PWM channels, each controlling independent lower MOSFETs and synchronous rectification paths. This allows simultaneous regulation of mismatched load profiles—high transient current on the primary CPU rail paired with stable lower current on auxiliary supplies.

Primary Rail Configuration

The primary output typically supplies 0.8V–1.2V at variable current (5A–25A depending on SoC load state). This rail powers the main processor core and integrates critical load-line resistors upstream of decoupling capacitors. Feedback sensing occurs at the VRM sense point near the SoC BGA, not at the IC output, compensating for PCB trace resistance.

Secondary Rail Configuration

The secondary output usually targets 1.8V or 3.3V (or occasionally 2.5V), supplying IO logic, memory controllers, or analog subsystems. Current draw is typically lower and more stable, allowing looser load-line tuning and less aggressive inductor sizing.

Both outputs share the same input supply. If the primary rail collapses due to inductor short or MOSFET failure, secondary regulation immediately fails due to loss of input voltage, creating a cascading failure signature on the board.

Critical Pinout &
Decoupling Requirements

The TPS51125 typically comes in a 32-pin QFN or BGA package. Functionally, the pins separate into five critical groups:

Group Pins Function Typical Voltage
Power Input VIN (3–4 pins) System bus voltage 13.0V–16.8V
Output 1 VOUT1, SW1 Primary CPU rail (PWM switch node) 0.8V–1.2V (switching)
Output 2 VOUT2, SW2 Secondary support rail 1.8V/3.3V
Feedback FB1, FB2 (sense inputs) Voltage monitoring for regulation ~0.6V reference
Control EN, MODE, VREF Enable, switching mode, external reference Logic level 0/3.3V

Input Capacitor Network

VIN requires a large film or ceramic capacitor bank (typically 47µF–100µF total, rated ≥25V) placed within 3mm of the IC pad. Undersized or distant input capacitors cause voltage sag exceeding ±200mV, triggering protection circuits or output shutdown.

Output Decoupling Strategy

Each rail requires staged capacitance: bulk storage (220µF–470µF ceramic, low ESR) near the IC, then distributed ceramic arrays (10µF, 4.7µF, 1µF) near the load (SoC, memory, IO blocks). The primary CPU rail alone may have 15–25 capacitors spread across the board. Total capacitance mismatch between rails causes cross-rail noise coupling.

Capacitor dry-joints are the #1 failure mode. Use DC ESR measurement to confirm all bulk caps are present and low-impedance. A 5A transient should stabilize output ripple to under 100mV peak-to-peak.

Failure Modes &
Diagnostic Protocol

Output Rail Collapse

Measured voltage at the primary rail drops to zero or <0.5V under load. Causes: shorted output capacitor (capacitor ESL rupture internally), shorted MOSFET switch, or inductor-to-ground short. Isolate by: (1) remove TPS51125, (2) measure voltage under power-on—if secondary rail recovers, IC was faulty. If both rails remain low, check inductor continuity using micro-ohm meter.

Regulation Drift (Hysteresis Oscillation)

Output voltage oscillates ±100mV or more, never settling. Typical cause is feedback network component failure—a 1% tolerance resistor divider used to scale sensed voltage to the 0.6V reference. Measure actual divider resistances (should track to better than 2% across both outputs). Replace mismatched pairs. Also check for cracked solder on FB sense traces near SoC BGA.

Soft-Start Failure (No Ramp)

Output voltage jumps instantly to nominal instead of ramping slowly over 100ms–1s. This stresses decoupling capacitor banks and can trigger secondary failures. Cause: compromised soft-start capacitor (often 2.2µF or 4.7µF, low-ESR ceramic) or open tracking resistor. Measure capacitor in circuit using LCR meter; should read within ±10% of nominal.

Secondary Rail Failure Only

Primary CPU rail is stable, but secondary output is dead or drifts. Indicates either: (1) shorted output capacitor on secondary, (2) short-to-ground in the secondary load rail (trace break, SoC pin damage), or (3) IC damage isolated to the secondary PWM channel. Inject 3.3V externally at the secondary rail output and measure IC behavior—if primary is unaffected, secondary channel failed. If primary collapses, shorted load detected downstream.

Never probe the switching nodes (SW1, SW2) directly with a multimeter on high-impedance mode. These nodes swing 2–3kHz at high dV/dt. Use a 10:1 scope probe only, and keep lead length under 2cm. Direct contact can induce latch-up via parasitic substrate paths.

Measurement Points &
Test Procedures

Quiescent Current (No Load)

With board idle (SoC in sleep), the TPS51125 draws approximately 2–5mA at nominal VIN. Measure by inserting a clamp-meter in the VIN supply path or breaking the input trace and measuring voltage drop across a known series resistance. Excessive current (>20mA) indicates internal loss or feedback oscillation.

Output Voltage Under Transient Load

Connect a programmable electronic load to the primary rail output (simulate 5A step). Capture with oscilloscope at 10kHz sample rate, 1V/div scale. Acceptable response: voltage droops ≤150mV, recovers to within ±2% nominal in under 50µs. Overshoot >10% indicates poor loop compensation (damaged compensation network on IC or feedback path).

Sense Point Verification

Use a precision multimeter to measure voltage at the FB sense point near the SoC—this location, not the IC output, should read exactly the programmed rail voltage (e.g., 0.95V for a primary rail, 1.8V for secondary). If measured voltage at SoC sense differs by >2% from IC output, a trace break or joint crack exists between IC and load.

Inductor DCR Measurement

Using an LCR meter set to resistance-only mode, measure both inductors at the IC pads. Typical DCR: primary inductor ≈10–20mΩ, secondary ≈20–40mΩ (varies by design). If reading exceeds 100mΩ, inductor is thermally damaged or core-shorted. Confirm by heating with heat gun—if resistance increases further, core saturation damage confirmed; replace inductor.

Always capture switching-node waveforms (SW1, SW2) with synchronized channels to confirm 180° phase opposition. Correct topology shows complementary high/low transition timing, confirming both FET gates are switching. If phase is inverted, FET gate driver IC may have failed.

Repair Strategy &
Component Replacement

Systematic isolation is essential. If TPS51125 is suspected bad, start with visual inspection: check for discoloration on the IC case (thermal damage), cracks in adjacent capacitors, or burnt solder residue around MOSFET gates.

Capacitor Replacement Priority

Begin by replacing all output capacitors on the affected rail(s)—use exact part numbers from schematic. Common failures: TAIYO_YUDEN or SAMSUNG MLCC caps, especially 10µF/6.3V units in the decoupling network. Solder with nitrogen-assist reflow to avoid voids. Measure ESR of replacement parts with LCR meter before installation (should be 5–15mΩ at 1kHz).

Feedback Network Repair

If regulation drifts, replace the feedback divider resistor pair (both R upper and R lower) as a unit, ensuring 1% tolerance matched set. Use 0402 or 0603 thin-film resistors for ±1% accuracy. Measure new divider ratio post-reflow (target 0.6V reference at nominal load).

TPS51125 Replacement

If isolated failure confirmed (both rails respond correctly after cap/inductor repair, but regulation still fails), the IC is likely defective. Micro-soldering the BGA is required. Recommend: (1) preheat board to 120°C for 90 seconds, (2) apply solder paste to pads with 0.1mm stencil, (3) place IC with X-ray vision (due to BGA pin count), (4) reflow in programmable oven with 240–250°C peak. Post-reflow, test all four rails and confirm pull-up/pull-down nets settle cleanly.

After component replacement, always perform a full voltage-under-load sweep: gradually increase load from 1A to rated maximum in 0.5A steps, measuring ripple and drooping. Log all measurements. If any rail exceeds ±5% nominal at full load, there is still an underlying issue—do not ship the board.