Variable voltage injection
to test regulators
What variable voltage
injection does
Variable voltage injection (VVI) isolates buck regulators and integrated power delivery stages by replacing their feedback loop with a known voltage source. Instead of letting the ISL6259, TPS51125, or MP2888A controller read voltage from the output rail via feedback divider, you inject a test voltage directly at the feedback pin. This forces the regulator to respond to your commanded voltage rather than its actual output.
Purpose: Confirm the regulator switches and responds to feedback changes. Detect stuck PWM, open feedback divider networks, shorted gate drivers, and failed controller ICs without risk of oscillation or runaway voltage.
Scope: Applies to any buck converter with an accessible feedback node—CPU VCORE, memory VDDQ, GPU PPBUS_G3H, auxiliary 3.3V/5V rails on GPU and SoC boards.
Equipment and
test setup
You need a variable DC power supply with precise voltage output and low source impedance. Budget supplies below 1% accuracy will introduce error into your readings.
Critical equipment checklist
- Programmable PSU or lab supply (0–5V range, 0.1V resolution minimum). Keysight E36100B or Agilent 6030A series preferred.
- Current-limited setup: Set supply to 100–500 mA limit to protect against shorts in feedback network.
- High-impedance multimeter (input impedance ≥10 MΩ) for measuring feedback node without loading it.
- Micro-probe or 0.5mm hookup wire to contact feedback divider tap point (typically the wiper of a resistor divider or output of a reference buffer).
- Oscilloscope (optional but valuable): 100 MHz minimum to observe gate drive waveforms and output ripple.
Ground reference is critical. Establish a common star ground point before connecting the test supply.
Step-by-step
injection procedure
Disconnect regulator input
Lift the input rail (typically 5V, 12V, or 19V depending on the converter) using desoldering or cutting a trace at the input capacitor. Verify no current flows by checking voltage across a series sense resistor (if present) or measuring input current with a clamp meter. Board should be unpowered at this stage.
Identify and isolate the feedback node
Locate the feedback divider. On most ISL6259 designs:
- Divider top resistor connects to VCORE output.
- Divider tap connects to a 0.1 µF bypass cap and feeds the FB pin on the IC.
- Divider bottom resistor connects to ground.
If present, disconnect the feedback capacitor from the tap node (lift one pad) to eliminate filtering that could mask oscillation. Leave it out during testing.
Connect test supply to feedback pin
Using a micro-probe or fine wire, connect the positive output of your variable supply to the isolated feedback node. Connect the ground from your supply to the board's ground star. Start with the supply set to 0.0V with 200 mA current limit.
Verify load impedance (no-load step)
Before powering the gate driver, measure the impedance of the feedback network. With the board unpowered, apply 0.6V from the test supply and measure current draw. Should be under 1 mA. If current exceeds 5 mA, check for shorted resistors in the divider or a faulty feedback capacitor.
Apply gate driver power only
Power only the gate driver IC (usually 12V or 5V auxiliary rail). Do not power the main input yet. Monitor gate drive voltage on both high-side and low-side gates with an oscilloscope if available. They should remain low (idle state).
Sweep feedback voltage slowly
Starting at 0.0V, increase the test supply voltage in 0.1V increments, pausing 1–2 seconds between steps. Observe for activity on the gate driver outputs. On the first gate pulse, record the exact feedback voltage that triggers PWM.
- For ISL6259 designs: PWM typically starts at 0.5–0.65V (below Vref).
- For TPS51125: Expect PWM near 0.75V.
Continue ramping to 1.2V or target output voltage. Pulse width should increase smoothly with rising feedback voltage.
Measure output voltage response
With the gate driver powered but main input still disconnected, monitor output voltage on PPBUS_G3H or target rail. It may remain at ground (no output power) because input is isolated. This is normal and expected. The test validates feedback path integrity and controller response, not output generation.
Interpreting
regulator response
Expected behavior for a healthy regulator during VVI:
| Feedback Voltage | Gate Output Behavior | Diagnosis |
|---|---|---|
| 0.0–0.4V | Continuous PWM pulses, 100% or near duty cycle | Controller wants maximum output. Normal. |
| 0.5–0.8V (near Vref) | Pulse width decreases as voltage increases | Feedback loop active and responsive. Healthy. |
| > 0.9V | PWM stops, gates remain low | Controller recognizes over-voltage. Normal shutdown. |
| No change at any voltage | Gates always high or always low | Gate driver stuck or controller comparator failed. Replace IC. |
| Noisy, unstable pulses | Jitter > 10% at constant Vfb | Oscillator or ramp generator fault. Check clock circuit. |
| Inverted response | Higher feedback = wider pulse | Feedback inverted at comparator. Damaged op-amp or IC pin. |
Faults caught
by variable injection
Open feedback divider
If no gate activity appears even at 1.0V injected feedback, and the controller is powered, suspect an open resistor in the divider chain. Inject voltage directly into the feedback capacitor (if present) to confirm the error is upstream. Resistance tests: top divider resistor should measure its nominal value (typically 10 kΩ to 100 kΩ); bottom should be 2 kΩ to 20 kΩ. Open = infinite resistance.
Shorted gate driver output
If gate nodes remain high even when feedback voltage exceeds Vref, the low-side driver FET may be shorted or the pull-down network failed. Lift the low-side gate and re-test. If PWM appears after lifting, replace the gate driver or check for solder bridges on driver control pins.
Noisy or unstable oscillator
Jittery PWM during VVI often points to a failing capacitor on the oscillator or ramp circuit. Check ceramic or film caps on the RT/CT pins of the controller. Replace any with ESR above 100 mΩ or visible cracks.
Reference voltage mismatch
If PWM begins at 0.3V instead of the expected 0.6V, the internal reference or bias circuit may be degraded. This often leads to under-voltage output and requires IC replacement.
After variable
voltage injection
If the regulator passes VVI and responds as expected, you have isolated the problem away from the power stage. Reconnect the regulator input under current-limited conditions (500 mA max) and observe output voltage rise. Compare actual output to calculated target using the divider ratio.
If output does not rise proportionally or oscillates, perform load testing with a programmable electronic load or a resistive load bank. Start at 10% of rated current and step up 10% every 30 seconds while monitoring voltage ripple, frequency stability, and thermal behavior.
Failed VVI results require component replacement. Do not attempt to work around a faulty controller or gate driver; modern regulators are tightly integrated and repairs are not field-serviceable at the IC level.
Document VVI results in your repair log, including the exact feedback voltage where PWM began, the response slope, and any anomalies observed. This baseline helps identify similar faults in later boards.